Intel英特爾完成新一代32nm製程開發

英特爾公司已完成新一代製程的開發，該製程可將晶片線路進一步縮小至32奈米 (nm)，一奈米相當於一米的十億分之一。英特爾將依計畫於2009年第四季運用這種新世代製程技術投產，以推出更大能源效率、更高密度、效能更強的電晶體。

英特爾預計下週在美國舊金山舉辦的國際電子元件會議 (International Electron Devices meeting, IEDM)中，進行簡報公佈更多與32nm製程相關的技術細節，以及其他相關主題。英特爾依既定時程完成32nm製程開發與投產準備，意味著該公司依循其 “tick-tock” (鐘擺模式)策略，準時推出一系列更具企圖心的新產品和先進製程。

The 32 nanometer (32 nm) process (also called 32 nanometer node) is the next step after the 45 nanometer process in CMOS manufacturing and fabrication. “32 nm” refers to the expected average half-pitch of a memory cell at this technology level. The two major chip rivals, Intel and AMD, are both working on a 32 nanometer process for logic, which uses significantly looser design rules.[1] AMD has partnered with IBM on this process, as it did with the 45 nm process. IBM and the Common Platform already has a 32 nm high-k metal gate process available,[2][3] while Intel has not yet announced a definite time or fab location for its 32 nm process; however, Intel has already given some indications as to the nature of its process and its rough timing for 2009.
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